DSP (Digital Signal Processor) is used more and more frequently in today's engineering applications. This does not benefit its three advantages. TI designed an integrated visual development environment CCS (CodeComposerStudio) for the company's DSP, and DSP / BIOS is an important part of CCS. This article mainly introduces the application of DSP / BIOS in power quality monitoring terminal. As a set of tools provided by CCS, DSP / BIOS itself occupies very little CPU resources, but it provides quite high performance and speeds up the development process.
DSP (Digital Signal Processor) is used more and more frequently in today's engineering applications. There are three main reasons for this: first, it has powerful computing capabilities and is capable of various digital signal processing algorithms such as FFT and digital filtering; second, major DSP manufacturers have designed related IDE (integrated development) Environment), making the development of DSP applications even more powerful; third, with high cost performance, relative to its powerful performance, low prices are absolutely competitive.
TI designed an integrated visual development environment CCS (CodeComposerStudio) for the company's DSP, and DSP / BIOS is an important part of CCS. It is essentially a real-time operating system kernel based on the TMS320 series DSP platform, and is also the core part of TI's real-time software technology-eXpressDSP technology. DSP / BIOS mainly includes three aspects: multi-threaded kernel, real-time analysis tool, and peripheral configuration library.
1. System functional requirements
The main function of the power quality monitoring terminal is to monitor and analyze the power quality of the power grid (three-phase voltage and current) in real time. The main monitoring quantities are: voltage, current effective value, active and reactive power, voltage frequency, three-phase unbalance, each harmonic voltage, current content rate, power factor, phase shift power factor, voltage fluctuation, long time, Flicker for a short time.
The system selects TI's high-performance DSP chip TMS320
As the processing core of F2812, its 150MIPS processing speed is sufficient to meet the real-time requirements of this system. According to system requirements, the system is divided into the following functional modules: guided self-test module, acquisition task execution module, power quality data preprocessing module, power quality analysis and calculation module, data storage module, communication module, and human-computer interaction module. According to the traditional programming method, these functional modules will be organized together in a sequential structure. The calling and switching between each module are completed by each module's own code, so that the application program modules are in a coupled state. If you want to add a new functional module or modify an existing functional module, not only to modify the calling code of the related module, but also the newly added module will obviously affect the time response characteristics of the original system, making upgrade and maintenance quite troublesome . The emergence of DSP / BIOS provides another mechanism for organizing functional modules of application programs. It treats each functional module as a task thread. Through the configurable kernel service, each task thread is multiplexed with CPU resources according to the priority of the system under the arrangement of the system scheduler. Through synchronization, communication, Coordination of data exchange, etc. This mechanism improves the maintainability of the application, and provides a more convenient and advanced means of testimony. According to the above characteristics, this system uses DSP / BIOS as the real-time kernel, and designs the entire system based on this.
2. Software design based on DSP / BIOS
2.1 Execution thread planning
In the real-time operation of the system, some functional functions are driven by external control signals or run on a predetermined cycle. Therefore, the driving method and execution cycle of the function are very important to the real-time system. DSP / BIOS supports multi-threaded applications, and threads can be defined with different priorities. High-priority threads can interrupt low-priority threads, and different threads can interact, such as blocking, communication, and synchronization. Threads are divided into the following four types (priority from high to low): hardware interrupt (HWI) , Software interrupt (SWI), task (TSK), background thread (IDL). According to the functional requirements of the power quality monitoring terminal system, each sub-function module of the system is divided into the above 4 types of threads.
First, arrange for hardware interrupt threads (HWI). Under normal circumstances, the main program code of the system is placed in the software interrupt or task; however, the function module program code that is closely related to the external device and requires high real-time performance must be placed in the hardware interrupt. According to the above requirements, the system sets the following sub-function modules as hardware interrupt threads: A / D collection task
Service module and communication module (receive). A / D acquisition is an important foundation of the system, and is closely connected with the underlying hardware of the system, so it is set as a hardware interrupt thread (HWI). The main process is: A / D chip collects real-time data of the power grid at a certain frequency, and then communicates with the McPSP port of DSP. The DSP receives the data collected by the A / D chip and stores it in a specific area of ​​the on-chip RAM to prepare for the operation of other threads. The communication module uses RS485 to communicate with the host computer, which is closely related to the underlying hardware of the system, and the SCI interface of the DSP itself has only a maximum of 16 words of FIFO. If the received data is not processed in time, it will cause data loss.
The following describes the parameter settings of the HWI module in DSP / BIOS. The receiving interrupt of the McBSP serial port is placed in the HWI_INT6 position of the HWI module, and the ISR function ad_rx_isr () of the receiving interrupt is filled into the function calling item of the HWI_INT6 interrupt; at the same time, the HWI scheduling function of DSP / RI-OS is selected to be used when responding to McBSP When the serial port receives an interrupt, the system will automatically call the ad_rx_isr () function. McBSP serial port receiving interrupt settings shown in Figure 2. Similar to the McBSP serial port receive interrupt setting, set the SCIA receive interrupt as the communication receive interrupt, and fill its ISR function scia_rx_isr () into the function call item of the HWI_INT9 interrupt. In response to receiving an interrupt, the system calls the scia_rx_isr () function for processing. The CLK thread is also one of the HWI hardware interrupt threads. It provides a time reference for the operation of the entire system, provides a method for users to periodically call functions, and provides a time reference for some code evaluation tools. The CLK module completely depends on the DSP timer interrupt, and the TMS320C2812 provides two timers for DSP / BIOS.
Second, arrange for software interrupt threads (SWI). All software interrupts are initiated through API calls from the DSP / BIOS kernel. For ease of control, the system sets a 16-bit mailbox (Mailbox) for each SWI object. The value of this mailbox can be used to conditionally start the corresponding Software interrupted. It is possible to arrange sub-function modules that are more important than ordinary tasks and have a relatively frequent frequency in the software interrupt thread (SWI). Its sub-function modules include: power quality data pre-processing module, communication module (send). The power quality data preprocessing module mainly completes the subsequent processing of the A / D conversion results. It is necessary to preprocess the A / D conversion results. Because the A / D chip selects a fixed frequency for acquisition, but the frequency fo of the power grid fluctuates, direct FFT operation on the collected data will cause spectrum leakage. Therefore, the collected data must be preprocessed. For example, 1024 points of FFT calculations are performed on a total of l024 pieces of data with 4 cycles of 256 points per cycle. Assuming that the average frequency of the four cycles is f, the frequency resolution is f / 4, and the result of the FFT operation is f / 4, 2f / 4, 3f / 4, f, 5f / 4 ... the intensity at the frequency. Therefore, when the grid frequency fo changes, the grid data frequency f for the FFT operation should also change accordingly, so that the grid data frequency f before the FFT operation is always consistent with the current grid frequency fo. The specific operation of the power quality data preprocessing module is to interpolate the A / D converted data, and the interpolation algorithm uses linear interpolation. After verification, under the rated voltage, the error of the FFT operation caused by the linear interpolation algorithm is within 0.1 ‰. In addition, the module also has a function to calculate the effective value of voltage within a cycle. This is necessary data to calculate voltage fluctuation and flicker for a long time and a short time. The communication module (send) is responsible for sending data to the upper computer. Although its real-time requirement is not high, it is closely connected with the bottom layer of the hardware, so it is set as a software interrupt thread. When the serial port receiving interrupt occurs, the scia_rx_isr () function is called to process the received data command, and the corresponding power quality data is sent according to the relevant command. DSP / BIOS provides the priority of O ~ 14 for the software interrupt object. According to the importance of the above thread, the collection data processing thread priority is set to 14, the host communication thread is set to 8, and other priorities are reserved for future software upgrades .
It should be noted that interrupt threads (including hardware interrupts and software interrupts) all run on the same stack. When a high-priority interrupt occurs and the system switches tasks, the high-priority interrupt thread will interrupt the low-priority interrupt thread; before running the high-priority interrupt thread, the relevant register content of the low-priority interrupt thread will be saved and the high-priority interrupt After the thread runs, the register will revert to the original content and continue to complete the original low priority thread. Therefore, if there are too many hardware interrupts or software interrupt threads, the stack will overflow. For this reason, most task modules must be placed in task threads. Next, schedule the task thread (TSK). Like most real-time systems, task threads are a major component of the entire system. The functions in the task thread can run independently or in parallel. The DSP / BIOS task management module arranges the operation according to the priority of the task thread, and completes the conversion from one task to another through the switching function. Each task has 4 execution states: run, ready, blocked, and terminated. The January task is created and it is always in one of 4 states. DSP / BIOS provides a priority of -l to 15 for each task object. Tasks will be executed in strict priority order, and tasks of the same priority will be arranged in accordance with the principle of "first come, first served". It should be noted that when creating a task thread, a dedicated stack belonging to the task needs to be established at the same time. This stack is used to store local variables or further function call nesting.
We set the power quality analysis calculation module, data storage module, and human-computer interaction module in the task thread (TSK). The power quality analysis and calculation module can be divided into three parts: harmonic calculation task thread, voltage fluctuation calculation task thread, and flicker calculation task thread. The harmonic calculation task thread is mainly responsible for performing FFT calculation on the results of power quality data preprocessing. The FFT operation mainly includes 5 parts: bit conversion operation, windowing operation, butterfly operation based on 2, split basis operation, and sum of square operation. The voltage fluctuation calculation task thread is responsible for recording the fluctuation of the grid voltage within 3 minutes. The previous power quality data pre-processing module has already obtained the voltage effective value of each cycle. In this way, it is only necessary to record the maximum and minimum value of the voltage effective value within 3 minutes. The difference between the two is the voltage fluctuation. The flicker calculation task thread includes calculating short-term flicker and long-term flicker. Now generally adopt the IEC flicker meter design method, the input adaptive self-test signal through the square demodulator, band-pass weighted filter, square first-order low-pass filter, online statistical evaluation 4 processes finally get flicker value; but this method is sufficient Complex and time-consuming. Through the algorithm simplification, a simple and feasible operation method is obtained: FFT operation is performed on the voltage effective values ​​of 256 consecutive cycles, and the result can be obtained a series of calculations such as weighting and a flicker value of 12.8s, and the flicker value within 10 minutes Short-term flicker can be obtained after related operations, and 12 consecutive short-time flickers (within 2h) can be obtained for a long time after operation. After verification, this algorithm has an error within l ‰ compared with the IEC flicker meter algorithm.
The data storage module is also placed in the task thread. The process is to store the power quality analysis results, voltage fluctuations and flicker values ​​in FIash. The human-computer interaction module includes two parts: keyboard detection task and LCD display task. The keyboard detection task thread can be completed by the periodic function PRD. PRD can determine the time the function runs based on the real-time clock. Here, set the keyboard detection task to run once every 100ms to detect the keys. According to the key condition, the LCD display task shows the current latest power quality data.
Finally, there is the background thread (IDL). The background thread (IDL) has the lowest priority. Generally, the real-time analysis module (TRA) is put into operation, which can perform real-time interaction and diagnosis on the DSP application program during the execution of the application program. CCS towels have real-time analysis tools such as CPU load graph, execution graph, host channel control, information recording, statistical observation, real-time control board and kernel / object observation. This series of functional modules can be placed in the IDL thread. Through these tools, the operation of the entire DSP system will be clear at a glance.
2.2 Communication and synchronization between threads
In this multi-threaded system, access to shared resources requires mutual coordination between threads to solve.
There are three kinds of communication methods under the DSP / BIOS environment, namely, pipe-based (PIPE) communication, stream-based (SIO) channel-based communication, and host-based (HST) channel-based communication.
In this system, the data pipeline is used to manage the data exchange between threads, because it is suitable for high-speed real-time or large-scale data exchange. Each data pipeline object retains a cache and divides the cache into fixed-length frames of certain data. All I / O operations through the data pipeline process 1 frame at a time. The synchronization between multiple threads mainly uses the mailbox method.
3. System
Real-time analysis and debugging
The overhead of the DSP / BIOS kernel itself will have an impact on the real-time performance of the system program. Therefore, the DSP / BIOS kernel needs to be optimized. You can use the DSP / BIOS analysis tool provided in CCS to determine the DSP / BIOS overhead and the amount of operation of the entire application system. For example, the CPU load graph in the real-time analysis tool provided by DSP / BIOS is one of the commonly used tools.
In the final integration stage, due to real-time interaction and other reasons, there will often be some errors or unresponsive phenomena. Generally speaking, because these phenomena are non-periodic and occur frequently, it is difficult to find and track. However, because the RTA module in the DSP / BIOS is embedded in its core, combined with the custom detection vector provided by the developer, it provides a unique view of the root cause of the error. This visualization function greatly helps to isolate and correct errors, which is not available in general embedded development systems.
You can improve the execution performance of application programs in the entire system from the following four aspects: carefully select the type of thread for different program functions; place the system stack in on-chip memory; reduce the frequency of clock interrupts; increase the size of the streaming input and output buffer .
4. Summary
As a set of tools provided by CCS, DSP / BIOS itself occupies very little CPU resources, but it provides quite high performance and speeds up the development process. Using DSP / BIOS as the real-time operating system of the power quality monitoring terminal, it is easy to control the hardware resources when writing the DSP program, flexible to coordinate various software modules, and greatly accelerate the development and debugging progress of the software. The final experiment proves that the whole system has good real-time performance and stable and reliable operation.
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